Phase detector operating principle for dummies. Phase detector based on back-to-back diodes. Phase detectors, circuits, main indicators

The phase-locked loop system ( is a very important and useful unit, produced as a separate integrated circuit by many manufacturers. The PLL contains a phase detector, an amplifier, and a voltage-controlled oscillator (VCO), and is a combination of analog and digital technology in one package. We will look further at the use of PLLs for tone decoding, demodulation of AM and FM signals, frequency multiplication, frequency synthesis, pulse synchronization of signals from noisy sources (for example, magnetic tape) and restoration of “clean” signals.

There is a traditional bias against PLLs, partly due to the difficulty of implementing PLLs on discrete components and partly to doubts about their reliable operation.

Rice. 9.67. Phase-locked loop circuit.

With the advent of inexpensive and easy-to-use PLL devices, the first obstacle to their widespread use has been overcome. When properly designed and used correctly, PLLs become as reliable circuit elements as op-amps or flip-flops.

In Fig. Figure 9.67 shows a classic PLL circuit. A phase detector is a device that compares two input frequencies and generates an output signal proportional to their phase difference (if, for example, the frequencies differ, a periodic signal at the difference frequency will appear at the output). If not equal to , then the filtered and amplified phase error signal will affect the VCO frequency, changing it in the direction of . At normal conditions The VCO quickly “locks” the frequency, maintaining a constant phase shift with respect to the input signal.

Since the filtered output of the phase detector is a DC signal and the control input signal of the VCO is a measure of the input frequency, it is clear that PLL can be used for FM detection and tone decoding (used in digital transmission over telephone lines). The output of the VCO is a local frequency signal equal to , so the VCO produces a clean reference signal that may contain noise. Since the VCO output signal can have any shape (triangular, sinusoidal, etc.), this allows the generation of, say, a sinusoidal signal synchronized with a sequence of input pulses.

In one common application of a PLL, a modulo counter is included between the output of the VCO and the phase detector, thus providing a multiplication of the input reference frequency. This is an ideal method for generating synchronization pulses at frequencies that are multiples of the frequency mains voltage, for integrating ADCs (two-stage and with charge balancing) with complete suppression of interference at the mains frequency and its harmonics. Such circuits are the main ones when constructing frequency synthesizers.

PLL components.

The simplest phase detector is the Type 1 (digital) detector, which is a simple EXCLUSIVE OR gate (Fig. 9.68). The figure shows the dependence of the output voltage on the phase difference when using a filter low frequencies and a square wave input with a duty cycle of 50%. A Type 1 (linear) phase detector has a similar output voltage versus phase difference, although its circuitry is a “four-quadrant multiplier,” also known as a “balanced mixer.” Phase detectors of this type, which have high linearity, are widely used in synchronous detection, which we will consider in Section. 15.15.

A Type 2 phase detector is sensitive only to the position of the signal edges and the VCO input signal, as shown in Fig. 9.69.

Rice. 9.68. Phase detector (type 1), made according to the Exclusive OR circuit.

The phase comparator circuit generates either lagging or leading output pulses depending on when the VCO output logic transitions occur, after or before the reference signal transitions, respectively. The width of these pulses is equal to the time interval between the corresponding edges, as shown in the figure. During the action of these impulses output circuit either removes or supplies current, and in the intervals between pulses it is in an open state, forming the relationship between the output voltage and the phase difference shown in Fig. 9.70. The process is completely independent of the duty cycle of the input pulses, unlike the situation with the Type 1 phase comparator discussed earlier. Another attractive feature of this phase detector is that the output pulses completely disappear when the two signals are synchronized. This means that there is no "ripple" in the output that causes periodic phase modulation in the circuit, as occurs with a Type 1 phase detector.

Rice. 9.69. Phase detector (type 2) leading-lag, operating “on edges”.

Let's compare the properties of phase detectors of two main types:

There is another difference between these two types of phase detectors. A type 1 detector always produces an output waveform, which must then be filtered using a control loop filter (discussed in more detail later). Thus, a Type 1 phase detector PLL contains a loop filter that acts as a low-pass filter to smooth the full-amplitude logic output signal. In such a circuit there is always some residual pulsation and, therefore, periodic phase changes. In circuits where a PLL is used to multiply or synthesize frequencies, “phase modulation sidebands” are also added to the output signal (see Section 13.18).

In contrast, a Type 2 phase detector generates output pulses only when there is a phase difference between the reference signal and the VCO signal. Since the phase detector output would otherwise appear as an open circuit, the loop filter capacitor acts as a voltage storage element, maintaining a voltage that maintains the desired VCO frequency. If the reference signal “goes out” in frequency, the phase detector generates a sequence of short pulses, charging (or discharging) the capacitor to the new voltage necessary to bring the VCO back into synchronism.

Voltage controlled generators. An important component of the PLL is the oscillator, the frequency of which can be controlled using the output of the phase detector. Some PLL ICs contain a VCO (for example, the 565 linear element and the 4046 CMOS element). In addition, there are separate VCO ICs listed in Table. 5.4. An interesting class of VCOs consists of elements with a sine wave output (8038, 2206, etc.), since they allow you to generate a pure sine wave, synchronized with the input wave of the “scary” type. Another class of VCOs worth mentioning are the voltage-to-frequency VCOs, which are typically designed for optimal linearity; they usually have a modest maximum frequency (up to 1 MHz) and produce pulses with logical levels (see Section 5.15).

It should be remembered that the frequency of the VCO is not limited by the speed of operation of the logic circuits. You can, for example, use radio frequency generators tuned using a varactor (diode with variable capacitance) (Fig. 9.71).

Taking this idea one step further, one could even use an element such as a reflective klystron - a microwave (gigahertz) oscillator, electrically tuned by varying the voltage across the reflector. Of course, a PLL using such oscillators will require an RF phase detector.

The frequency dependence of the control voltage of the VCO used in the PLL may not be highly linear, but in the case of large nonlinearity, the gain in the circuit will change in accordance with the frequency of the signal and a larger margin of stability will have to be provided.

Digital detectors - 2 -

PULSE AND DIGITAL DETECTORS

In most modern radio-electronic systems, receiving devices are a very complex structure that processes analog signals using digital methods. One of their main elements are pulse and digital detectors.

Phase detector based on logic elements

Such detectors are based on discrete logic elements, and are often called pulsed. In phase detectors based on logic elements, the FM oscillation is converted into a pulse voltage, the duty cycle of which depends on the phase of the input signal.

In Fig. 6.25, A a diagram of a phase detector is shown, and in Fig. 6.25, b - f diagrams explaining its operation.

The pulse phase detector has two inputs, one of them is supplied with an FM signal u FM ( t) = u FM (Fig. 6.25, b), on the other - reference voltage u OP ( t) = u OP (Fig. 6.25, G). The PM signal and the reference voltage are supplied to the forming devices UV 1 and UV 2, respectively, which are used as comparators. Sequences of rectangular pulses appear at the UV outputs u 1 And u 2 (Figure 6.25, c, d), the duration of which is equal to the half-cycles of the input oscillations - the FM signal and the reference voltage, respectively. Generated impulse voltages u 1 And u 2 are supplied to the AND logical link, which is the AND-NOT logical element. Pulse voltage u and amplitude U 0 at the output of this link is formed only under the simultaneous action of voltages u 1 And u 2 (Fig. 6.25, e) The low-pass filter extracts a constant component from this voltage, the amplitude of which is U c is determined by the formula (it is not difficult to derive):

According to (6.16), output voltage U c phase detector on logic elements linearly depends on the phase shift of the PM signal relative to the phase of the reference voltage.

Digital phase detector

Let's analyze the detection processes of the so-called sign signal, which is a sequence of potential impulses (“ones”) and pauses (“zeros”). The simplest analogues of such oscillations are signals with PWM, or PIM.

Let's consider phase detection of a periodic Sequence of rectangular pulses. Note that there is a delay of some time τ periodic signal with repetition period T is equivalent to rotating its phase by a certain angle φ = 2πτ /T. The simplest scheme digital phase detector(CFD) is shown in Fig. 6.26, A.

CFD is made on integral JK-trigger, to the output of which a low-pass filter is connected in the form of an integrating R.C.-chains. In Fig. 6.26, b time diagrams of sign signal voltages are shown u FM (reflecting FM oscillation), clock sequence of pulses u op (i.e., the reference voltage, with the phase of which the phase of the sign signal is compared) and the signal U(t) at the output of the CFD. Pulse signal Q at the exit JK- flip-flop corresponds to its truth table.

As follows from the voltage diagrams, the duration of the trigger output pulses is proportional to the time (and, therefore, phase) shift between oscillations u FM and u op. CPD output voltage U(t) formed by smoothing impulses Q in low-pass filter.

Digital phase detectors can be built not only on integrated JK- trigger, but also on other logical circuits: the “Exclusive OR” element, R.S.- trigger, etc. Using these circuits, it is quite easy to obtain the duration of the output pulses, directly proportional to the time delay between the signals u FM and u op, and then smooth out these pulses in the low-pass filter. In Fig. 6.27, A As an example, a diagram of the CFD on the “Exclusive OR” element is given ( Modulo two adder). The timing diagrams of the CFD operation are shown in Fig. 6.27, b. In this circuit, the pulse voltage y, generated in the “Exclusive OR” circuit is fed to the low-pass filter. Voltage U(t) at the low-pass filter output is proportional to the shift of the FM signal relative to the reference u op. This detector is more noise-resistant than a trigger-based CPD. The fact is that triggers are triggered by pulse edges, therefore, in the event of “bouncing” of these edges, the output signal of the digital photodiode may be significantly distorted. In contrast, the XOR circuit operates based on the levels of the input signals, so short noise or interference pulses that cause the edges of these signals to “bounce” cannot noticeably distort the output voltage.

In paragraph 7.4, digital synthesizers with indirect frequency synthesis were considered, one of the main elements of which can be called a phase discriminator. Similar devices are used in any digital phase-locked loop systems used for both synthesis fluctuations with constant frequency, and for frequency or phase modulation and demodulation RF signals. The phase discriminator parameters determine the highest operating frequency or comparison frequency of the PLL loop, as well as such critical parameters as the acquisition and hold bandwidths of the PLL loop.

In digital PLL systems, the following types of phase discriminators are mainly used:

· phase detector (PD) on the “Exclusive OR” logic element;

· phase detector on an RS trigger or JK trigger;

· digital frequency-phase detector (PDF).

The first two types of detectors are characterized by the fact that their output contains constant pressure, proportional to the phase shift when the frequencies of the input and reference signals are equal, and beats, the frequency of which depends on the difference in the frequencies of these signals, if these frequencies are not equal. In this case, the beats can have a constant component in a certain range of detunings, leading the PLL loop to ultimately lock the frequency of the input signal, but with a sufficiently large frequency mismatch, the beats become almost harmonic and frequency locking is no longer possible. It is clear that in this case the system’s acquisition band is narrower than the retention band. Figure 7.7.1 illustrates the process of frequency locking by a PLL system with a PD on an “XOR” logic element (the dependence of the PD output voltage on time is shown, obtained by simulating the operation of the PLL loop on a computer). In this case, the initial frequency detuning of the VCO is so large that the beats of the PD output voltage are purely harmonic and their constant component is zero, i.e. The PD does not have a tuning effect on the VCO (left side of the figure). An external control input is applied to the VCO, slowly shifting its frequency to a value at which its frequency can be locked by the PLL loop; in this case, the shape of the beat of the output oscillation of the PD begins to differ from the harmonic one, a constant component appears, affecting the average value of the VCO frequency (middle part of the figure). At some point, the VCO frequency falls into the capture band of the PLL loop - and capture occurs: after a short transient process, a constant voltage is established at the PD output, proportional to the phase difference between the reference oscillation and the VCO oscillations supplied to the PD (right side of the figure).

Unlike phase detectors, a frequency-phase detector has no beats at the output for any frequency mismatch, but there is a constant voltage that adjusts the adjustable generator so as to reduce this mismatch. Thus, the output voltage of the PFD is a function of both the phase difference (in synchronous mode) and the frequency difference (in the absence of synchronism) of the oscillations arriving at it. Due to this, in a PLL system containing a digital frequency-phase detector, the capture band is equal to the hold band.

Figure 7.7.2 shows the structure of the simplest digital PFD, built on two D-flip-flops. The states of their outputs determine the operation of transistor switches VT1, VT2 as follows.

Q1=1, Q2=1 - the “logical AND” element DD3 sets a logical 1 at its output, which is fed through a delay device to the inputs of the CLR flip-flops, resetting their outputs to 0.

Q1=0, Q2=0 - both switches are open, the PFD output is in the third state.

Q1=1, Q2=0 - switch VT1 is closed, VT2 is open, the PFD output has a voltage close to the supply voltage, which corresponds to logical 1.

Q1=0, Q2=1 - switch VT1 is open, VT2 is closed, the voltage at the PFD output is close to zero, which corresponds to logical 0.

Let's consider the behavior of the circuit in the case when the signal frequency at Input 1 is higher than the frequency at Input 2, Fig. 7.7.3A. It can be seen from the figure that in this case, a 1 at the output of the PFD will appear more often than 0 (triggers are triggered by a positive edge at the synchronizing input), and the VCO frequency will be pulled higher, to the frequency of the reference oscillator (it is assumed that the VCO is made using a varicap). This will continue until the frequencies are equal, causing the VCO frequency to lock. In the case when in the initial state the VCO frequency is significantly higher than the reference oscillator frequency, 0 will prevail at the PFD output, lowering the VCO frequency until it is captured by the PLL loop.

Modern PFDs are produced in the form of ICs, and can operate at frequencies up to 200 MHz, which allows them to be used in the IF paths of radio transmitting devices of modern communication standards. They have a means of eliminating the phase deadband located at the center of the phase response. An example of a modern PFD chip is the AD9901, the structure of which is shown in Fig. 7.7.4. It differs fundamentally from the one discussed above (Fig. 7.7.2) by the presence of frequency dividers of input signals on D-flip-flops. They provide the phase discriminator, made on the “Exclusive OR” element, with rectangular oscillations to improve its operation, and also shift the dead zone from the center of the phase characteristic to its edges.

The characteristics of such a PFD are shown in Fig. 7.7.5, where zones of deadness and nonlinearity are visible depending on the operating frequency of the detector. Note that at frequencies of hundreds of kHz, this characteristic has a linear section extending over the entire 360°.

There are two types of PFDs, differing in the way their output stages are constructed: PFDs with voltage output (Fig. 7.7.4) and PFDs with current output; the latter option is more often called a charge pump circuit or a “charge pump” (or CP - charge pump), the use of which in a PLL loop circuit was already mentioned in paragraph 7.4. Replacing transistors VT1 and VT2 in Fig. 7.7.2 to current sources, as shown in Fig. 7.7.6, we obtain the charge pump PFD diagram in a generalized form.

The type of loop filter connected to the PFD output depends on what pulses - current or voltage - are generated by the PFD circuit; Accordingly, the characteristics of the entire PLL loop also differ. In Fig. 7.7.7 shows frequently encountered options for loop filter circuits for the “current” and “potential” versions of the PFD output stages. To improve the filtering properties of a loop filter with respect to impulse noise penetrating from the output of the PFD to the control input of the VCO, an additional filter element (AFE) is sometimes used, the elements of which are highlighted in the lower diagram of the figure with a dotted line. An operational amplifier connected between the loop filter and the VCO control input serves as a buffer stage, reducing the load on the filter from the VCO input side. Myself operational amplifier must have a minimum input current (picoamps) and low level own noise. Let us recall (see paragraph 7.4 and Fig. 7.4.3) that leakage currents arising in the elements (capacitors) of the loop filter or the load current from the control input of the VCO lead to the penetration of unwanted components with the reference frequency and its harmonics into the oscillation spectrum of the VCO .

Separately, it should be said about the operation of the PLL loop, which uses a PFD with a current output “charge pump” loaded on a loop filter, which includes an ideal integrating link. It was already noted in paragraph 7.4 that in this case the PLL loop acquires the property of astatism, i.e. The phase error in steady-state synchronous mode does not depend on the initial frequency detuning of the VCO relative to the oscillation of the reference oscillator and, ideally, always tends to zero. Let us show this using the example of the circuit shown in Fig. 7.7.6.

Let the PLL loop have the simplest structure, similar to that shown in Fig. 7.7.3; This does not reduce the generality of our reasoning. At Input 1 of the PFD there is an oscillation of the reference oscillator with a constant frequency w OP = pj OP (where p = d / dt is the differentiation operator, j OP is the linearly increasing total phase of the reference oscillation). At Input 2 of the PFD, there is, in turn, an oscillation of the VCO with a frequency depending on E UPR (p) - the control action of the PFD, transmitted through the loop filter:

w VCO = pj VCO = w VCO SV. – 2pS VUN E UPR (r),

where j VCO is the total phase of the VCO oscillation, w VCO SV. is the value of the VCO frequency without control action from the PFD (“free”), S VCO is the slope of the linear section of the static modulation characteristic of the VCO.

Detection methods and detector characteristics

Detection- the process of isolating a modulating signal from a modulated oscillation or signal.

Detection can be carried out with coherent and incoherent signal reception.

At coherent reception, When detecting, data about the initial phase of the signal is used.

At incoherent reception, When detecting, data about the initial phase of the signal is not used.

Detection is carried out in devices called detectors. The conventional graphic designation of the detector has the form:

Figure 38 - Symbolic graphic designation of the detector: a) for coherent reception, b) for incoherent reception

The characteristics of the detector are: detector, frequency characteristics and transmission coefficient.

Detector characteristic represents the dependence of the constant voltage component at the output of the detector on changes in the information parameter of the carrier supplied to it. In AM, the information parameter is amplitude, in FM, frequency, in FM, phase.

The ideal characteristic is linear passing through the origin at an angle a to the abscissa axis (Figure 39). The actual characteristic has deviations that lead to nonlinear distortions of the modulating signal.

Figure 39 - Detector characteristics of the detector

Frequency response represents the dependence of the amplitude of the output voltage Um u of the detector on the frequency of the modulating harmonic signal. The actual characteristic is linear and constant for Um u at all frequencies (Figure 40). Deviation of the actual characteristic from the ideal one leads to frequency distortions of the modulating signal. Just like for modulators, the detector bandwidth is determined by the frequency response.

Figure 40 - Detector frequency response

Detector transmission coefficient is determined for a harmonic modulating signal and is equal to the ratio of the amplitude of the harmonic signal Um u to the amplitude of the increment of the carrier information parameter

Kd =Um u/ ?Um. (27)

The transmission coefficient of the detector can be determined from the detector characteristic:

Kd =ktg ? (28)

where k is the proportionality scale factor.

Detection of amplitude modulated signals

Incoherent amplitude detector using a diode

Fundamental electrical diagram incoherent amplitude detector is shown in Figure 41. The detector includes a nonlinear element - a VD diode. The need for a nonlinear element is due to the fact that the detection process is associated with the transformation of the signal spectrum. Diagrams explaining the principle of operation of the modulator are presented in Figure 42.

Figure 41 - Schematic diagram of an incoherent amplitude detector on a diode

The diode receives an AM signal S AM (t), in the spectrum of which there is a component of the carrier signal and side components (Figure 42, a). In the response spectrum of the diode u d (t), new components appear: constant, the component of the modulating signal and the higher harmonics of the modulated signal (Figure 42, b). Elements R1 C1 form a low-pass filter, which shunts the high-frequency components of the response spectrum and thereby separates the modulating signal component and the constant component u of the low-pass filter (t) (Figure 42, c). Separating capacitor C2 delays the constant component of the spectrum and only the component of the modulating signal u(t) is present in the spectrum of the output signal (Figure 42, d).

Effective suppression of high-frequency components by the low-pass filter of the detector is possible if the following condition is met:

Figure 42 - AM signal detection process

1/ ? 0 C 1<< R 1 << 1/ ? C 1 (29)

where C 1 and R 1 are elements of the low-pass filter.

When detecting, two modes are distinguished: quadratic and linear.

At quadratic mode To detect signals, a nonlinear section of the diode’s current-voltage characteristic is used, which is approximated by a second-degree polynomial (Figure 43). In this mode, small amplitude input signals can be used, but this results in large nonlinear signal distortions.

Figure 43 - Detection modes

At linear mode The linear section of the diode's current-voltage characteristic is used. In this mode, the input signals must have a sufficiently large amplitude, but there is no nonlinear signal distortion.

The disadvantage of this detector is a change in the signal-to-interference ratio at the modulator output, which can lead to the suppression of a weak signal by strong interference. Therefore, when using this detector, it is necessary to first suppress interference and then detect the signal, i.e., apply pre-detector signal processing.

The transmission coefficient of the amplitude detector is determined by the expression:

where R1 is the low-pass filter resistance of the detector;

Sav is the average slope of the diode’s current-voltage characteristic.

Synchronous detection

Synchronous detection is a detection that uses a reference wave with a frequency and phase corresponding to the frequency and phase of the carrier wave.

The structural electrical diagram of the synchronous detector is shown in Figure 44.

Figure 44 - Structural electrical diagram of a synchronous detector

The inputs of a balanced or ring modulator receive the signal S AM (t) and the reference oscillation from the generator u r (t):

SAM(t) = Um(1 + mAMu(t)) cos (w 0 t+? 0 );

uG(t) = UmGcos(w 0 t+? 0 ).

The signal u 1 (t) is generated at the modulator output

u 1 (t) = SAM(t) ? uG(t) = Um (1 + mAM u(t)) cos (w 0 t + j 0 ) ?

? UmG cos (w 0 t + ? 0 ) = 0,5 Um UmG(1 + mAMu(t)) ?

? (1 + cos (2 w 0 t + 2 ? 0 )) (31)

The low-pass filter at the modulator output suppresses high-frequency and DC components and highlights the components of the modulating signal:

uout(t) = 0,5 Um UmG mAM u(t) (32)

To obtain a reference vibration with the frequency and phase of the carrier vibration, a block is used phase-locked loop(PLL). The PLL block extracts the carrier oscillation from the incoming signal and adjusts the generator to its parameters.

The property and main advantage of a synchronous detector is the preservation of the signal-to-noise ratio at the detector output. This is explained by the fact that this detector is a frequency converter that transfers the signal spectrum to the low frequency region without changing the signal shape and the relationships between the spectrum components. This property of the detector allows the use of post-detection signal processing.

The synchronous detector can also detect balanced-modulated and single-sideband modulated signals. However, in this case, difficulties arise in obtaining information about the frequency and phase of the carrier wave, since the carrier wave component is absent in the spectrum of these signals. Therefore, two technical solutions are used to detect these signals:

• used for detection pilot signal, which represents the remainder of the carrier oscillation and is transmitted along with the signal, and is allocated by the PLL system at reception;
• When detecting, a highly stable reference oscillator is used on the receiving side, which is not synchronized at all. For detection, a local carrier different from that transmitted to ?? is used. In this case, there arises frequency shift in the communication channel (Figure 45). If this shift does not exceed 10 Hz for a telephone signal, then the recipient does not feel it. This implies strict requirements for the stability of generator equipment of communication systems with OM.

Figure 45 - Process of frequency shift in a communication channel

Detection of frequency modulated signals

Detection of FM signals can be carried out with coherent and incoherent reception. Let us consider the detection of FM signals during incoherent reception. In this case, detection is carried out in two stages:

• converting a frequency-modulated signal into an amplitude-frequency modulated signal (AFM);
• detection of AFM signal with an amplitude detector.

The circuit diagram of a single-cycle frequency detector is shown in Figure 46.

Figure 46 - Schematic diagram of a single-cycle frequency detector

In this detector, the converter of the FM signal into AFM is carried out using an oscillatory circuit L1 C1. The circuit is detuned relative to the carrier frequency, that is, its resonant frequency is not equal to the frequency of the carrier signal (Figure 47).

As the frequency of the FM signal increases, does it approach the resonant frequency of the circuit? the cut and amplitude of the oscillation u K (t) increases. As the frequency of the FM signal decreases, it moves away from the resonant frequency of the circuit and the amplitude u K (t) decreases. Thus, at the output of the circuit, the oscillation is a modulated signal, in which both the amplitude and frequency change (AFM signal). This signal is then detected by an amplitude detector.

Figure 47 - Frequency detector timing diagrams

The detector characteristic of this detector is presented in Figure 48. This characteristic is nonlinear, and therefore, when detected by this detector, the modulating signal has nonlinear distortions.

Figure 48 - Detector characteristic of a single-cycle frequency detector

To eliminate nonlinear distortions, a balanced (push-pull) frequency detector circuit is used (Figure 49). In this detector, are both oscillatory circuits mutually detuned relative to the carrier frequency and have different resonant frequencies? res1 and? res2, the characteristics of the circuits are presented in Figure 50.

Figure 49 - Schematic diagram of a balanced frequency detector

Figure 50 - Frequency dependence of the oscillatory circuits of the balanced detector

As a result, we obtain a characteristic in which there is a linear section between the resonant frequencies? res1 and? res2, which is used for detection. The detector response of the balanced detector is shown in Figure 51.

Figure 51 - Detector characteristic of a balanced frequency detector

Detection of phase-modulated signals

Detection of FM signals is carried out during coherent reception. Detection of these signals is carried out in two stages:

• converting an FM signal into an amplitude-phase modulated signal (AFM);
• detection of an AFM signal using an amplitude detector.

The circuit diagram of a single-cycle phase detector is shown in Figure 52.

Figure 52 - Schematic diagram of a single-cycle phase detector

It is an amplitude detector that uses a reference waveform. The conversion of an FM signal to an AFM signal is carried out by a VD diode. Two voltages are supplied to the diode: reference oscillation u op (t) with phase? = 0 and FM signal u fm (t). The diode voltage is determined by the sum of these voltages:

ud(t) = uop(t)+ ufm(t) (33)

The formation of voltage on the diode is illustrated by a vector diagram (Figure 53). Suppose at some point in time the FM signal has a phase value? fm1 corresponding to the slope of the vector u fm1, then the voltage on the diode will correspond to the vector u d1. At the next moment of time, the phase of the FM signal will change and will correspond to the angle of inclination? fm2 of the vector u fm2 (in this case, the length of the vector corresponds to the length of the vector u d1, since the amplitude of the FM signal does not change). The voltage on the diode at this point in time corresponds to the vector u d2. As can be seen from the diagram, the vectors u d1 and u d2 have different lengths and, accordingly, different amplitudes.

Figure 53 - Formation of voltages on the diode

Thus, the diode converts the FM signal into an AFM signal. Simultaneously with this transformation, the diode transforms the spectrum of the AFM signal, and further detection is carried out similarly to detection with a single-ended amplitude detector. The detector characteristic of a single-ended phase detector is presented in Figure 54. As you can see, this characteristic is nonlinear, which leads to nonlinear distortion of the modulating signal.

Figure 54 - Detector characteristic of a single-cycle phase detector

To reduce nonlinear distortions, a balanced (push-pull) phase modulator is used (Figure 55).

Figure 55 - Schematic diagram of a balanced phase detector

This detector consists of two single-cycle phase detectors. The reference voltage u op (t) is supplied between the midpoint of the secondary winding of the transformer (T) and the connection points of resistors R1 R2 and capacitors C1 C2. The PM signal voltage u fm (t) is supplied through the primary winding of the transformer. Let at some moment of time a signal u fm (t) with phase?(t) and voltage polarity corresponding to that indicated in the figure arrive at the detector input. In this case, the voltage on the diodes will be determined:

ud1 = uop + 0,5 ufm;

uD 2 = uop — 0,5 ufm. (34)

In this case, the vector diagram will look like (Figure 56). As can be seen from the diagram, the input signal voltage on each of the diodes is half of the detector input voltage u fm and these voltages are opposite in phase. The voltage on the diodes is determined by the vectors u d1 and u d2. As follows from the diagram u d1 > u d2. The output voltage of each single-ended detector will be determined by:

uoutput1(t) = K dUmd1;

uoutput2(t) = K dUmD 2 (35)

where K d is the detector transmission coefficient.

Figure 56 - Formation of voltages on the diodes of a balanced phase detector

Since these voltages are opposite, the output voltage of the balanced detector is determined by:

uout(t) = uoutput1(t) — uoutput2(t) = K d (Umd1 — UmD 2) (36)

The detector characteristic of the balanced detector is presented in Figure 57.

Figure 57 - Detector characteristic of a balanced phase detector

As can be seen from the characteristics at?(t) = 90° and?(t) = 180°, the output voltage is zero, since Um d1 = Um d2 and u out1 (t) = u out2 (t). Near the indicated angles, the characteristic has linear sections, the use of which during detection makes it possible to eliminate nonlinear distortions of the modulating signal.

Detection of manipulated signals

Detection of amplitude-shift keyed signals.

Detection of these signals can be carried out using the amplitude diode detector discussed above (Figure 39).

Detection of frequency-shift keyed signals.

The structural electrical diagram of the FSK signal detector and diagrams explaining its operation are shown in Figures 58 and 59.

Figure 58 - Structural electrical diagram of the FSK signal detector

An FSK signal is received at the detector input (Figure 59, a). This signal goes to bandpass filters PF1 and PF2, each of the PF allocates its own frequency band (Figure 59, b, c). The received signals are detected by amplitude detectors AD1 and AD2 (Figure 59, d, e). The received signals enter the subtracting device, and the signal u AD2 (t) arrives in negative polarity. An output signal is generated in the subtracting device (Figure 59, e):

uout (t) =u AD1 (t)— u AD2 (t)(37)

Figure 59 - Process of detecting FM signals

Detection of phase-keyed signals.

Detection of these signals is carried out during coherent reception. The structural electrical diagram of the FM signal receiver is shown in Figure 60.

Figure 60 - Block diagram of an FM signal receiver

The input oscillation Z(t) is supplied to the input of the bandpass filter. The PF performs pre-detection signal processing, i.e., it limits the level of interference at the receiver input. The PSK signal from the PF output enters the PD phase detector, the second input of which receives a reference oscillation from the generator. Adjustment of the frequency and phase of the reference oscillations is carried out by the PLL phase-locked loop system. The frequency and phase of the reference oscillations must coincide with the frequency and phase of one of the signals S 1 (t) or S 2 (t). The signal received at the output of the PD enters the decision device, which determines which signal is received u 1 or u 2. The signal is determined by comparing the amplitude of the discrete element arriving from the PD with a zero level, which is removed from the housing: if the amplitude of the discrete element arriving from the PD is greater than zero, then an element of positive polarity u 2 (“1”) is received, if less than zero, then the element is received negative polarity u 1 (“0”).

The main disadvantage of this scheme and, accordingly, of a system with PSK is the need to transmit along with the information signal phase lock signal, which leads to additional power costs and, accordingly, a decrease in the efficiency of PSK. The need to transmit synchronization signals is due to the fact that the oscillation phase of the reference oscillator must coincide with the phase of one of the signals S 1 or S 2 with high accuracy. Using the input signal Z(t) for phase synchronization purposes leads to the effect reverse work. The reverse operation consists of replacing, by detecting, signal u 1 with signal u 2 and vice versa. Reverse operation occurs when the phase of the reference oscillations of the generator is reversed. This arises due to the fact that with equally probable signals S 1 and S 2 differing from each other in phase by 180°, there are no signs at reception by which one can determine the phase of which signal was accepted as the reference. The oscillator, adjusted by the PLL system, can generate oscillations with two stable states of phase 0 or 180°. In a communication channel, under the influence of interference, the phase of the signal used for synchronization changes. If it does not correspond to 0 or 180°, then the generator adjusts to the nearest phase, i.e. if the phase changes by less than 90°, then the generator will adjust to the correct phase of the signal (there is no reverse operation), if by more than 90°, then the generator adjusts to the opposite phase and reverse operation occurs. From the above we can conclude that the source of reverse work in the receiver is a PLL generator.

Detection of relatively phase-modulated signals.

Detection of VPSK signals can be carried out by two methods: the phase comparison method (provides incoherent reception) and the polarity comparison method (provides coherent reception).

At phase comparison method the sources of feedback operation, the generator and the PLL, are replaced by a delay line, which delays the signal for the duration of one discrete element (Figure 61). The phase detector compares the phases of the received signal and the previous one. The output signal of the RU is generated in the same way as in the PSK signal receiver. Since in this circuit the received signal is used as a reference oscillation, the occurrence of reverse operation is excluded.

Figure 61 - Structural electrical diagram of an OFPSK signal receiver: phase comparison method

At polarity comparison method The receiver consists of two parts: a PSK signal receiver and a relative decoder (Figure 62). When detecting signals in the PSK signal receiver, reverse operation occurs. The signal from the receiver output enters the comparison device of the relative decoder control system. The second input of the control system receives the previous output signal of the receiver. The signal is delayed by one discrete element by a delay line. In the control system, the polarities of the two elements are compared and an output signal is generated. The formation of a discrete element of the output signal is carried out according to the rule: if the polarities of both signals coincide, then a signal of positive polarity u 2 (“1”) is generated, if the polarities do not coincide, then a signal of negative polarity u 1 (“0”). Since reverse operation changes the polarity of both the current and previous sendings, it does not affect the operation of the control system.

Figure 62 - Functional electrical diagram of a VPSK signal receiver: polarity comparison method

Detection of pulse-modulated signals

A feature of MI signals is the presence in their spectrum of low-frequency components of the modulating signal. Therefore, a nonlinear element is not used to detect these signals. Detection is carried out by a filter, with the help of which the components of the modulating signal are isolated. To do this, the cutoff frequencies of the filter must be equal to the lowest Fmin and highest Fmax frequency of the modulating signal spectrum. Detection of primary (low-frequency) signals is carried out by a low-pass filter.

A) AIM detection signals. If the duty cycle of the AIM signal pulses is large q>>1, then detection is carried out by a peak detector.

Peak detector- called an amplitude detector, the output voltage of which is proportional to the amplitude of the pulses and remains approximately constant over the interval of the pulse repetition period T.

In the spectrum of PPM signals, the level of modulation frequency components is insignificant, and it also depends on the modulation frequency. Therefore, PPM signals cannot be directly detected by low-pass filters. These signals are first converted into PWM or PWM signals, and then detected by a low-pass filter. However, to convert a PPM signal, it is necessary to transmit synchronizing clock pulses along with it, and this complicates the detector circuit.

To increase noise immunity in the receiver, received pulse-modulated signals are subjected to regeneration.

Regeneration— the process of restoring the shape of impulses.

Figure 63 shows timing diagrams that explain the regeneration of a pulse modulated signal. Figure 63, a shows the transmitted pulse-modulated signal Sm per (t). Figure 63, b shows the received signal Z pr (t). The shape of this signal is distorted due to the influence of fluctuation and impulse noise in the communication channel. Regeneration is carried out by limiting the amplitude of the pulses to the maximum and minimum at a level close to half peak value pulses (Figure 63, c). During regeneration, the received signal may be distorted due to the large amplitude of the pulsed noise, however, most of the interference is suppressed.

Since during regeneration the pulse amplitude is limited, AIM signals cannot be regenerated, since the amplitude of these signals is an information parameter.

Figure 63 - Regeneration of pulse-modulated signals

Detection of angle modulated signals.

When detecting PM and FM signals, they are first converted into AM oscillations and then detected by an amplitude detector. This conversion is necessary because nonlinear elements respond to changes in amplitude, not frequency.

In radio signals with PM, the change in phase increment repeats the law of the modulating signal (message):

A phase detector is a device that generates an output signal, the law of change of which corresponds to the law of change in the phase of the input signal.

For this in the phase detector is produced: multiplication of two signals of the same frequency:

radio input, (4)

reference vibration (generated by a reference voltage generator), and averaging the resulting result over time using a low-pass filter.

A generalized view of the PD block diagram is presented in Figure 6.

Rice. 6. Generalized structural scheme phase detector

The recording form of the PD output voltage changes for various conditions. Thus, if the amplitude of the reference oscillation is constant, then the output voltage of the PD will be determined by the expression

where is the PD transmission coefficient.

From expression (5) it is clear that the output signal of the PD is proportional to the cosine of the phase difference of the signals supplied to the nonlinear element.

In general, the dependence on the magnitude of the phase difference acting at the voltage input is called its discriminatory characteristic.

From expression (5) it follows that PD output voltage repeats the law of the transmitted message up to a constant factor. However, it also depends on the amplitude of the input signal. To eliminate this dependence, AGC circuits or limiters are used.

Frequency detector.

In FM radio signals, the change in frequency increment repeats the law of change in the modulating signal (message), i.e.

BH is intended to isolate the LF modulating oscillation from the input FM oscillation.

The output of the black hole produces a voltage that varies over time according to modulation changes in the instantaneous radio or intermediate frequency of the received signal.

The dependence of voltage on the oscillation frequency at the input is called detector (discrimination) characteristic BH.

Frequency, at which the voltage at the output of the black hole is zero, is called transitional.

Often the discriminatory characteristic of BH is the dependence of this voltage on the detuning , i.e. .

For the linear section of this characteristic, the following relation holds true:

where is the black hole transmission coefficient.

To detect the input FM signal in the frequency detector, as well as in the phase detector, this signal is converted into AM oscillations. This problem is solved using various linear circuits and, in particular, a resonant circuit.

Figure 7 shows a block diagram of a black hole. From the diagram it follows that BH includes in its composition: two detuned circuits (these are bandpass filters PF 1 and PF 2), loaded onto amplitude detectors AD 1 and AD 2 and a subtracting device.

a)

Rice. 7. Frequency detector (a); amplitude-frequency characteristics

upset contours (b); discriminatory characteristic of BH (c)

Operating principle of black hole explained by the graphs shown in Figure 7, b and Figure 7, c.

Bandpass filters PF1 and PF2 are detuned by an amount. The amplitude of the voltage supplied from the circuit to the amplitude detector depends on the frequency.

Bandpass filters PF1 and PF2 are characterized by corresponding frequency responses (Fig. 7, b), which intersect at the transition frequency point. Input signal u s (t) is supplied simultaneously to both PFs, at the output of each of which an AM signal is generated, the magnitude of which depends on the frequency u s(t).

The generated AM oscillations are demodulated in the corresponding IMs and fed to a subtracting device.

As a result, if the FM oscillations are greater than , then And .